Vivek Jambhekar is a seasoned Engineering Manager and Senior Principal Engineer at Broadcom, where he plays a pivotal role in advancing the company's ASIC verification capabilities. With a robust background in DFT architecture and frontend design, Vivek leads the chip design verification (DV) efforts for...
Vivek Jambhekar is a seasoned Engineering Manager and Senior Principal Engineer at Broadcom, where he plays a pivotal role in advancing the company's ASIC verification capabilities. With a robust background in DFT architecture and frontend design, Vivek leads the chip design verification (DV) efforts for a diverse portfolio of products, including VoIP systems, application processors, multimedia solutions, and baseband processors. His expertise in test planning, testbench development, and execution ensures that each chip meets the highest standards of quality and performance.
Vivek is adept in employing advanced DV methodologies such as SystemVerilog UVM/VMM and formal verification techniques, which are crucial for mitigating risks in complex ASIC designs. His proficiency in hardware acceleration using Palladium allows for rapid simulation and validation, significantly enhancing the efficiency of the verification process. Additionally, Vivek is instrumental in coverage tracking, ensuring that all functional aspects of the chips are thoroughly tested and validated before they move to post-silicon bring-up and productization.
His extensive skill set encompasses testing, simulations, RTL design, and static timing analysis, making him a key asset in the development of cutting-edge technologies. Vivek's leadership in managing multiple chip projects not only drives innovation at Broadcom but also fosters a collaborative environment where engineering excellence thrives. As the industry continues to evolve, Vivek remains committed to leveraging his expertise to push the boundaries of ASIC design and verification, ensuring that Broadcom remains at the forefront of technological advancements.
