Thomas Jones is a seasoned Hardware Physical Chip Design Engineer at IBM, specializing in AI workloads within the Brain Inspired Computing Group. His current role is pivotal in the development of a neuromorphic accelerator chip, where he combines his expertise in CAD methodologies with hands-on...
Thomas Jones is a seasoned Hardware Physical Chip Design Engineer at IBM, specializing in AI workloads within the Brain Inspired Computing Group. His current role is pivotal in the development of a neuromorphic accelerator chip, where he combines his expertise in CAD methodologies with hands-on physical design. With a robust background in digital IC physical design, Thomas is instrumental in creating innovative design flows and methodologies that push the boundaries of ASIC/SOC hardware development.
At IBM, Thomas is leading the charge in establishing a comprehensive IC design and implementation CAD flow from the ground up. This involves not only the integration of advanced CAD software tools but also the optimization of physical design processes to ensure efficiency and performance. His responsibilities encompass a wide range of tasks, including clock tree synthesis, low-power design strategies, and ensuring design rule compliance (DRC) to meet stringent industry standards.
Thomas's proficiency in tools such as Cadence Virtuoso and Encounter, combined with his skills in TCL scripting and object-oriented design, enables him to tackle complex challenges in low-power systems effectively. His innovative mindset and detail-oriented approach allow him to thrive in high-stakes environments, where creative solutions are essential. As he continues to contribute to the development of cutting-edge technologies at IBM, Thomas remains committed to advancing the field of hardware design, particularly in the realm of AI and neuromorphic computing. His work not only enhances the capabilities of modern computing systems but also sets the stage for future breakthroughs in intelligent hardware design.
